1. Field of the Invention
The present invention relates to a field-effect semiconductor device, and more particularly to a novel field-effect semiconductor device realizing both low-noise and high-output operating characteristics.
2. Description of Related Art
With increasing demand for satellite broadcast receiver systems, attention has been directed to improvements in the performance of super-low-noise field-effect transistors that constitute the important parts of such systems. To improve the performance of this type of transistor, it is essential to reduce the gate length or increase transconductance, etc.
The present inventors have already proposed, in Japanese Patent Application Laid-Open No. 3-316426 (1991), a field-effect semiconductor device designed to reduce the noise figure during high frequency operation while satisfying the above requirements.
FIG. 1 is a schematic cross-sectional view showing the structure of the field-effect transistor disclosed in the above-said Patent Application. In the figure, the reference numeral 1 designates a semi-insulating GaAs substrate, on which an undoped GaAs layer 2 as a buffer layer, an undoped InGaAs layer 3, an n-type n-InGaAs layer 4, an n-type n-AlGaAs layer 5, and an n-type n-GaAs layer 6 as a capping layer are formed one on top of another in this order. A source electrode 7 is connected to one side of the n-GaAs layer 6 to the other side of which is connected a drain electrode 8. Formed between the source electrode 7 and the drain electrode 8 is a gate electrode 9 forming a Schottky junction with the n-AlGaAs layer 5.
Since it is difficult to reduce noise when electrons flow through a highly doped semiconductor layer, the structure of the above field-effect transistor is such that some of the electrons are passed through the undoped InGaAs layer 3 during transistor operation in order to suppress the generation of noise.
However, with the above structure, it is not possible to suppress the generation of noise below a satisfactory level; to meet the recently increasing needs for lower noise operation, a further reduction in the noise figure is demanded.
Another prior art related to the present invention is a MESFET structure that uses as the channel layer an n-In.sub.x Ga.sub.1-x As layer with the composition ratio of In varied in a graded manner (Japanese Patent Application Laid-Open No. 64-57677(1989)). With this structure, however, it is difficult to reduce the noise figure since electrons travel through the doped semiconductor layer (n-In.sub.x Ga.sub.1-x As layer).